Jul 10, 2018 #1 R Risewisun Newbie level 1 Joined Jul 10, 2018 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 5 Extra region lines after regrid__silvaco Hello, everyone! I'm learning to use silvaco to simulate FETs. But while I use regrid to make a fine design of the structure, there is always extra region lines in it. Please see the picture. How could I avoid these lines?
Extra region lines after regrid__silvaco Hello, everyone! I'm learning to use silvaco to simulate FETs. But while I use regrid to make a fine design of the structure, there is always extra region lines in it. Please see the picture. How could I avoid these lines?