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How to amplify 60-MHz 0.3 Vpp signal to rail-to-rail 0 to 2 V signal

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DoYouLinux

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Hi all,

In an application, I need to amplify a low-level clock signal of 60-MHz frequency and 300-mVpeak-to-peak amplitude to a rail-to-rail level of 0 V to 2 V. Does anyone know an IC to do this job ?

Thanks a lot,

DYL
 

I've previously outlined a quick-n-dirty approach to do this at higher frequency/lower amplitude in this post: https://www.edaboard.com/threads/279340/#post1196981

Pay attention to proper analog signal design/layout aspects with any clock "amplification" scheme if the clock's jitter specification is important to you.
 

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