praveen1984
Newbie level 5
vhdl doubt
how to add a text file into a vhdl desription...........if we r using verilog we can use 'include compiler directive to include a text file in to our description......is there any method in vhdl ......
how to add a text file into a vhdl desription...........if we r using verilog we can use 'include compiler directive to include a text file in to our description......is there any method in vhdl ......