ashwini jayaraman
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This is the program:
Delay = 1 seconds
; Clock frequency = 11.0592 MHz
; Actual delay = 1 seconds = 2764800 cycles
; Error = 0 %
[/CODE]
I doesn't understand how this is happening...when I calculated theoretically, I got just 11161 instruction cycles...but in a website it is given as 2764795 cycles. also, I want to know how the no of instruction cycles vary with respect to delay... Plz do explain somebody..or suggest me some websites so that I will learn from that..I did google for this..But couldn't find the relevant explanation at all..am badly stuck up with this for the past few days...
Delay = 1 seconds
; Clock frequency = 11.0592 MHz
; Actual delay = 1 seconds = 2764800 cycles
; Error = 0 %
Code:
cblock
d1
d2
d3
endc
Delay
;2764795 cycles
movlw 0xDA
movwf d1
movlw 0x07
movwf d2
movlw 0x07
movwf d3
Delay_0
decfsz d1, f
goto $+2
decfsz d2, f
goto $+2
decfsz d3, f
goto Delay_0
;1 cycle
nop
;4 cycles (including call)
return[CODE]
I doesn't understand how this is happening...when I calculated theoretically, I got just 11161 instruction cycles...but in a website it is given as 2764795 cycles. also, I want to know how the no of instruction cycles vary with respect to delay... Plz do explain somebody..or suggest me some websites so that I will learn from that..I did google for this..But couldn't find the relevant explanation at all..am badly stuck up with this for the past few days...