how this channel leakage generated?

[lhlbluesky]

in the following picture, the schematic is a part of an ir receiver, here is a twin-t notch filter and a non-inverting amplifier.
in the notch filter, R is programmable (s[2:0]), and switch here is nmos transistor (having body effect), when simulation(assuming s[2:0]=100), in some corner, the leakage current of s[2] is 25nA also, causing a voltage drop of 10mv between VI and non-inverting input of opamp of notch filter; while in other corner, the leakage current of s[2] is only 20pA (what i expected).
i checked the operating point, the leakage current of s[2] is not substrate leakage, it is channel leakage between source and drain. and if i disconnect the output of notch filter with input of the non-inverting amplifier (VR is reference voltage from bandgap), the above leakage current of s[2] can be 20pA~50pA for all corners, as i expected. this is very strange. i wonder why.
how is the channel leakage current of s[2] generated? or is it gate leakage of input pair of notch filter opamp?
please give me some suggestions, thanks all.

 

[dick_freebird]

When you say "in some corner", is that "model world"
or "real world"? A model that attempts to represent
the worst case leakage floor might, well, leak. I'd say
the first thing to do is visit that corner and take some
classical I-V curves in simulation, looking for differences
against nominal particularly.

Then you can decide whether you are fighting a fiction
or a yet-unencountered production reality.

 

[lhlbluesky]

"in some corner" is in "model world", such as tt/3.3/25deg, tt/3.3/85deg (normal: tt/3.0/25deg). and i'm also confused why leakage current is related to the loadind of notch filter, the loading is connected with inverting-end of notch filter opamp, while channel leakage occurs in non-inverting-end of notch filter opamp.