how many flip flop are used ?

[Chen Zaizhou]

synopsys design visions,
report _areas
is sequential cells counts = flip flop counts ?

 

[rca]

yes,
or all_registers sdc command to report the latch and flops.

 

[Chen Zaizhou]

thanks a lot,
by the way, I am wondering that when i doing sta using the primetime toool, do I needs the sdf file, ?
It seems that the sdf is output file for functional simulation , right ?

 

[rca]

sdf is an input of simulator to add timing delay cell/net on gated simulations.

PrimeTime is a tool to check timing power constraints, and for the timing & power, it is recommended to used the SPEF for the R/C network and the liberty for the delay/power cells.