mjuneja
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Hello guys
I want to understand how user I/Os pins in FPGA, which can be programmed either as input, output or bidirectional pin in VHDL/Verilog source code; are realized inside FPGA to function either as input or output or bidirectional pin.
Do we have tristate buffer to implement such functions or something else ?
Does it depend on the technology as well ?
I want to understand how user I/Os pins in FPGA, which can be programmed either as input, output or bidirectional pin in VHDL/Verilog source code; are realized inside FPGA to function either as input or output or bidirectional pin.
Do we have tristate buffer to implement such functions or something else ?
Does it depend on the technology as well ?