[SOLVED] How does Xilinx IP cores for sine waves generate Sine wave?

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keerthna

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Sine wave is analog in nature. And FPGA can read only digital values. So how will IP cores generate sine waves? I didnt get the actual meaning here. Can anyone please explain
 

Do you know how a microcontroller or a cpu for that matter generates a sine wave? Well, fpga do the exact same thing. You may want to look up Direct Digital Synthesis and DAC.
 

It may use Lookup tables which have the sine/cosine value in a ROM
 

But if i want to change the modulation index in accordance with the carrier, is it possible to do the same with ipcores? if not then how do i generate sine waves with variable modulation index?
 

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