[SOLVED] How does Xilinx IP cores for sine waves generate Sine wave?

[keerthna]

Sine wave is analog in nature. And FPGA can read only digital values. So how will IP cores generate sine waves? I didnt get the actual meaning here. Can anyone please explain

 

[mrflibble]

Do you know how a microcontroller or a cpu for that matter generates a sine wave? Well, fpga do the exact same thing. You may want to look up Direct Digital Synthesis and DAC.

 

[gbounce]

https://en.wikipedia.org/wiki/CORDIC

 

[sherif123]

It may use Lookup tables which have the sine/cosine value in a ROM

 

[keerthna]

But if i want to change the modulation index in accordance with the carrier, is it possible to do the same with ipcores? if not then how do i generate sine waves with variable modulation index?

 

[mrflibble]

Google "xilinx dds compiler modulation" => http://forums.xilinx.com/t5/Digital...nd/FM-modulation-with-help-of-DDS/td-p/212377