How does temperature affect set-up and hold time

[czhe]

Hi all,

I'm not sure if this is an appropriate question for this forum, but maybe someone can point me in the right direction.

I've been told that temperature has an affect on the setup and hold times of the ASIC. Can anyone elaborate on why this is?

Thanks any for any feedback,
czhe

 

[eChipDesign]

Device Switching is fastest at low temperatures.

The timing analysis are done at extreme corners to ensure that they meet the timing specs.

a. Fastest case: Fast N and Fast P transistors, High Vdd, Low Temperature

b. Slowest Case: Slow N and Slow P transistors, low Vdd, High Temperature



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VLSI Training for Verilog and System Verilog
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[gliss]

Device Switching is fastest at low temperatures.

This isn't necessarily true in all cases. In some process technologies there is a phenomenon called temperature inversion. In this case, a ss0p81v110c operating condition corner might be the same speed or faster than the ss0p81v0c corner, for example.

 

[ljxpjpjljx]

also in the latest technology, the corner case has added 6!

 

[raju3295]

yes, in the latest technologies, setup implementation also checked in the temparature inversion corner (-40) as the delays are more here,