Interested in the part on:
Given the physical ram size, how does the virtual address gets translated to the physical address(what this address is)?
I am doing simulation work here. I was given a standard workload trace (e.g gzip) with virtual addresses and i need to be able to translate that into physical addresses to test my ram controller model.
No startup code.. just program specific traces.. was given virtual addresses that were meant to access the dram.. this trace is an extraction from a cache simulator..
The trace was supplied to me by my ex-supervisor who had left the school.. not much instruction was passed down.. when i got back from summer.. he was gone..
I am an undergrad student.. so i might not fully understand some jargon used in processor simulation work..
Suppose with the bootcode, what should i look for? hope to bug my new supervisor for it..
Do you mind explaining the setting of the MMU mapping table for the below code? Would like to grasp a better understanding.. especially what is the wAttrib for?
You give this function the virtual start and end addresses and the start of physical address they map to. Last argument is related to the cache parameters like cacheable or not, bufferable or not, faulty to access or not.
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Amr Ali