How does a Sigma Delta ADC work?

[pawan kumar]

Hi Friends,

I am wondering how Sigma Delta ADC's work with a 1 bit Comparator. I went through some articles and I have a rough idea of its architecture. There's a 1 bit comparator and the input is sampled many more times than the Nyquist rate.

Suppose I have a 0 to 10V measuring Sigma Delta ADC, There should be a comparator with 5V Threshold at one terminal of it inside. Now, how does this distinguish between 6V and 8V DC? Even if it samples 1000 times more, both result in logic '1' since it is greater than 5V.

Someone please explain me without much of Frequency Domain. I don't want to know much about Quantization noise cancellation and things.

Pawan

 

[crutschow]

The comparator does not have a fixed threshold. There is an integrator which provides feedback from the previous sample that effectively changes the trigger point for each subsequent sample. The result is a pulse-density serial output which has an average value equal to the input voltage (you can actually directly run the serial pulses through an analog low-pass filter and recover the input signal).

This may help explain the process.

 

[KlausST]

Hi,

use google, search for : "working principle delta sigma adc"

There are loads of very usefull information. Internet pages, PDFs and even videos.

I just picked two of them :
www.ti.com/lit/an/slyt423/slyt423.pdf
www.ti.com/lit/an/slyt438/slyt438.pdf

****
The main thing you forgot in your description is:
* the comparator is not at the analog input
* there is a comparator (feedbacked with the comparator output) and an error integrator before it.

Klaus

 

[schmitt trigger]

Analog devices at their website have an interactive simulation, which is very useful and provides lots of insight:

https://www.analog.com/en/design-ce...ve-design-tools/sigma-delta-adc-tutorial.html

 

[pawan kumar]

Excellent! Thanks for the help friends.
I had come across the TI's link you had shared KlausST. And you were right, I had an assumption that the comparator's the first stage of the ADC.
The Maxim article link shared by crutschow and the AD simulation link shared by schmitt trigger are superb.

Thanks.
Pawan

 

[t4_v]

Bunch of other useful resources:

1. Delta-sigma Data converters Theory, Design and Simulation - Steven R. Northworthy, Richard Schreier, Gabor C. Temes
2. **broken link removed**
3. old good Wikipedia: http://en.wikipedia.org/wiki/Delta-sigma_modulation

 

[pankaj jha]

Hi Friends,

I am wondering how Sigma Delta ADC's work with a 1 bit Comparator. I went through some articles and I have a rough idea of its architecture. There's a 1 bit comparator and the input is sampled many more times than the Nyquist rate.

Suppose I have a 0 to 10V measuring Sigma Delta ADC, There should be a comparator with 5V Threshold at one terminal of it inside. Now, how does this distinguish between 6V and 8V DC? Even if it samples 1000 times more, both result in logic '1' since it is greater than 5V.

Someone please explain me without much of Frequency Domain. I don't want to know much about Quantization noise cancellation and things.

Pawan

Bakers book "CMOS: MIXED-SIGNAL CIRCUIT DESIGN" is an excellent material on quantitative understanding of data converters... it also has chapter on noise shaping data converters...