Re: PLL fundamentals
Hi !
A Phase Locked Loop circuit is used to synthesize frequencies from the following blocks: a reference generator, a phase comparator, a low pass filter, a voltage controlled oscillator and the feedback loop (with or without ferquency divider).
In a very simple explanation, PLL works by changing the voltage applied to the VCO, which will generate a signal with frequency proportional to this voltage. This signal originated from the VCO is feedbacked to the phase detector, which compares the phase (and the frequency) of both: the signal generated by the VCO and the signal coming from the Reference Generator. If both signal are in phase and/or same frequency, the phase detector will output a square wave signal, which is passed by the low pass filter, that converts it to an average voltage signal (the mid control voltage) applied to the VCO. When it happens, we say the PLL is locked at the reference frequency. If the VCO outputs a signal with lower frequency than the reference, so the phase detector and the low pass filter will output an higher DC control voltage, so increasing the VCO output frequency, changing it gradually up to the reference frequency. The reverse is true, if the VCO outputs a higher frequency than the reference signal, the phase detector and low pass filter will output a lower dc control voltage, so decreasing the VCO output frequency, until it locks again to the desired frequency.
So imagine that you have a 20MHz crystal oscillator as reference generator, but you need a 80MHz signal at the VCO output. You can use the PLL to multiply and synthesize this higher frequency. Then you divide the VCO output by 4 (the /N block), the signal to be compared with the reference signal has to be 20MHz to lock the PLL, but the VCO is going to generate in fact a 4x frequency signal. The /N block defines the multiplier of reference signal, to be used at the VCO output.