Where is charging device for A or B node?
hspice2008 said:I use pwl source ,let vdd rise from 0v to 3v in several ns . then I can see whether the bandgap output can reach its final value without ripple, if have ripple, I will change or compensate the circuits, to eliminate it
in addition , I will run all conners to test the startup of it
Teddy said:current to the PMOS should be > cca 0.5uA
decent scaling could be: Pmos 10/10 ;
Left NMOS : 50/10, right NMOS 10/10, MS 3/1
enjoy!
ccw27 said:I have a question. Does it matter what Vbg is? i.e. does it matter if you have 1.2 or 0.6 V Bandgap voltage reference? You normally reference current to other parts of the circuit not voltage. Or is bandgap voltage needed somewhere?
Thanks
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