[SOLVED] how do you consider FPGA verification?

[backstreet]

Do you think it's a good job?
how do you think of this job?
i

 

[khorram]

It has different meanings:

1) Verify the netlist extracted after FPGA programming.
2) Verify the design in the board level and develop/design facilities to do this kind of verification.

I'd prefer the second one, because there is not any lint tools to do that. Notice that it depends to the FPGA boards and you should have some detailed information of FPGA boards.

Regards,
KH

 

[backstreet]

Hi,Mr khorram
Thanks to your suggestion.
Now,my role is FPGA verification about a small scale chip(about 600 row RTL code)
,and my role is the second one according to what you said.
But my board is a little simple indeed,
i think this kind of verification is slide effort .
how do you think of it?

Regards,
backstreet.

 

[khorram]

Hi backstreet,

I think if you are beginner in the digital design, it will be great. But you should improve your knowledge and try to design a system into ASIC target. Because you can take some experiences and learn about some fields, like placement and routing in layout generation, which do not note in the FPGA target design.

Regards,
KH

 

[ljunesnow]

i think the fisrt one which Mr. khorram had said is also important and complex, especially in large design. it invole all kinds of mathods writing test bench. it's an art.

 

[arunragavan]

it is a difficult job.. . the verification engineer has to try all possibility to stamp the end product for this required benchmarks. its a challenging job as you surely wud discover new frontiers while veryfyin each version of FPGA produced.. actually it wud be much better if its ASIC verification.. broader and better scope.. but aneway as a newbie its always better to start off with this.. gain more knoledge which wud always help.

with regards,

 

[backstreet]

Hi khorram,ljunesnow and arunragavan,

Thank you very much for your advice!
Your advice make me have a better perceive on fpga verification.I am a newbie in digital design,and now my role is fpga verification about a 8 bits' MCU. I have 2 questions:

1) it is MCU ,so i should learn Assembly language well,right?Now i have a book
<<Art of Assembly language >>,i tells about PC's Assembly language.and if the
MCU's Assembly language is more appropriate?

2)now i recognize the importance of verification.But the verification what you
mentioned are all about verification in fpga?And i have some books about verification ,for example,<<ASIC.and.FPGA.Verification.A.Guide.to.Component.Modeling>>
,<<Advanced Formal Verification>>.they tell many arithmetics about verification.
But i don't konw how the verificatin can be realized in fpga ?and with which kind of
language?

I am sorry that my quenstion is so amateurish...

Best regards
backstreet

 

[khorram]

You need to know Assembly language, because you should write some test benches and implement the hardware.
I recommend you to write a C code as golden model. Golden model means a high level model of the design which does not have any bugs. This C code is similar to a simulator of that MCU. After implementing your hardware, you can apply different testbenches to both and check the equivalency of them. This kind of verification is called Equivalence Checking (EC).

Regards,
KH

 

[masm]

Hi khorram,
i am backstreet.i have started to learn <<the art of Assembly language>>.
But how can i use C code to simulate the MCU?
Would you mind showing me some information about that?

Regards
backstreet

 

[andy1]

Khorram,

I would strongly recommend you learn either Verilog or VHDL in order to do hardware design or simulate a design. It's not very complicate since you already know hardware and programming basics.

It may take a graduate course to be able to use C codes to simulate a hardware environment.

 

[ylscqu]

general it can't verify all condition,so when design ,
you should consider testable

 

[masai_mara]

WIth FPGA's you only do functional and timing verification. So basically you are checking whether the logic you have implemented is what you wanted. Having said this this area is also gaining importance since nowadays the designs ported onto fpga is alo increasing. So if the design is modest then you can just write test benches and scripts to simulate the design. So if you are having an MCU in the fpga you have to get to know the assembly language so that you check whether the MCU inside the fpga does indeed behave as an MCU. So the scripts will be basically doing that and you need to have a test bench in some hdl like verilog or vhdl to feed these values and observe the output. As some have pointed out you dont need to model an MCU in C or other language to verify it successfully as it isnt very complex in fucntionality. More over modeling is time consuming and not without errors and are justified only when the design is complex such as soc's.

cheers.