How do I represent this symbol in spice?

[bobobano]

what the fudge symbol

I think this symbol isn't being simulated correctly in spice, as my current setup for this doesn't seem to be working as pictured here

My professor says it's a split collector pnp and should be simulated as shown in the picture shown above.:???:

 

[keith1200rs]

Yes it is a double collector transistor. It looks like it has two bases as well. It should simulate OK with just two transistors in parallel. What you have drawn seems to have an extra transistor which I suspect could be your problem.

Also, the transistors Q14 and Q35 in the original circuit seem to have a floating collector whereas you have connected it to the base. It may not be relevant, but it could be.

Keith.

 

[erikl]

Yes it is a double collector transistor. It looks like it has two bases as well.

Looking closely I think it is a triple collector pnp, with one of the collectors connected to its base, just as bobobano has modeled it with 3 2N2904 devices.

@bobobano: Do you expect to be able to correctly simulate an LM565 PLL with 2N2219 & 2N2904 models?

 

[keith1200rs]

My mistake. I must admit it didn't look right for a second base but then it didn't look like a collector either. I normally draw all collectors on the same side.

Keith

 

[bobobano]

Looking closely I think it is a triple collector pnp, with one of the collectors connected to its base, just as bobobano has modeled it with 3 2N2904 devices.

@bobobano: Do you expect to be able to correctly simulate an LM565 PLL with 2N2219 & 2N2904 models?

Those are the devices my prof told me to use. One of my group members just got this to work actually. Thank you for your help on the matter.

 

[FvM]

Yes, it looks like a 1:2 unsymmetrical current mirror, correctly represented by three transistors of equal area.

At least two transistors (Q14 & Q35) apperently intended as as Z-diodes won't be simulated correctly, because the SPICE transistor model doesn't include a base-emitter reverse breakdown voltage. So the DC operation point of some circuit parts will be wrong.

Furthermore, most transistors of the NE565 monolithic circuit will have an area, that's only a small fraction of the used types. It can be adjusted by using an area factor. Also the low ft of lateral pnp transistors (about 5 MHz) should be considered for a realistic simulation.

I guess, that the 2Nxxxx transistor will mostly give correct circuit operation at lower VCO frequencies, but the Z-diode function should be supplemented.