Can any one explain me how clock transition and library set -up time are related ......means if there is relaxed transition what could be its effect on library set-up time ( increase or decrease ) and WHY ?
Re: HOW CLOCK TRANSITION AND LIBRARY SET UP TIME ARE RELATED
Greater is the value of clock transition time, greater is the setup time. In a tech lib setuptimes are measured for different input slopes(transition times).
Why? it is because slow transition means more time for the transistor(s) to turn off/on.
Kr,
Avi http://www.vlsiip.com
Ok .....for further info , if i have changed clock transition from ideal to 250ps , and if initially my library set-up time was 200 ps .....what would in the second case ( means when i have changed clock trnasition ) ....will it be more than 200ps or less then 200ps .
Re: HOW CLOCK TRANSITION AND LIBRARY SET UP TIME ARE RELATED
I wont compare ideal vs non ideal, as spice can have many unwanted effects off the ideal clock. So compare the setup times when
1). input transition time of clk is say 250 ps (non ideal)
2). input transition time of clk is say 500ps (non ideal)
and the setup time would increase in 500ps case.
Try it out and let me know what happens?
Kr,
Avi http://www.vlsiip.com