Any ADC can be interfaced with FPGA, either fast or slow, using parallel or serial protocols. But it's not ready to use, you need to write the respective interface logic.
Decide about your specification (resolution, speed, number of channels etc.), choose an ADC chip, design the interface.
Some FPGA eval kits are implementing a "poor mans" sigma delta ADC by using a FPGA differential input and an output pin providing feedback through a RC circuit.