How can I use this Gm/Id methodology to calculate W/L ?

[engrvip]

id vs gm curve transistor

can anyone tell me how can i use this Gm/Id methodology to calculate W/L of transisitors in my circuit.........it has been show in Boris Murmann's notes at Stanford for a circuit like common source amplifier ....but how to use it for some such circuit where u dont have formulas to play with to calculate Gm/Id?????

 

[nxing]

moderate gm/id

If you give more details about the circuit you are trying to design, people can some advice. Without a circuit, it's too vast to discuss it.

 

[engrvip]

gm/id: ieee

for example i am designing one current feedback amplifier which is basciallya cousin of our general operational amplifier.....and now if see in my ckt. there will be lot of source followers and current mirror kind of stuff in it ......so now how can i use Gm/Id methodoolgy to calculate aspect ratios of each and every transistor.

 

[Guest]

jespers + gm/id

Dear friend,
In fact when you use gm/Id methodology, noting gds (conductance) of transistor is proportional to its current. so if you fix gm/Id really you can maintain DC gain of your circuit;
but if for a specific performance at the same DC gain you design a large area circuit, thus your circuit has essentially worse frequencya nd time domain response!
in other words, the best design methodology is to specified a desired gain, then changing current levels (and coresponding needed W's and L's).
Hope to be useful! if you want, click on "help me", it doesn't cost you!

Regards,
SAZ

 

[cellphone]

d. flandre gm/id methodology

There is a paper:
"A gm/Id based methodology for the design of CMOS Analog circuits and.....", F. Silveira, D. Flandre , and PGA Jespers, IEEE Journal of SS ckts, No. 9, Sep 1996.

There is a curve that you can derive: Gm/Id Vs Id/(W/L). Once, you can derive this curve for your process technology, you can use this curve and calculate the W/L once you determine the region of the operation (e.g. weak inv, stron inv, mod. inv) for the different transistors.

It is a very useful methodology. The paper also gives an example using an op amp.

 

[nxing]

gm vs id of an amplifier

actually, in berkeley's EE240 course, Prof. Boser gave a very detailed design procedure of using this method.

 

[haoshs]

boris murmann gm id

Dear friends:
I have read the papars "A gm/Id based methodology for the design of CMOS Analog circuits and.....",
But I still confuse about how to determine the value of gm/Id accurately.
for example, if a transistor should be biased in the strong inversion regime, how can I determine the value of gm/id is 10 or 5 or any other value?
anyone can help me?
THx!!!!

 

[cellphone]

Gm/Id methodology

In my opinion we have to first understand that there is no abrupt transition between weak inversion and moderate inversion, and modeterate inverstion and strong inversion, and strong inverstion and velocity saturation.

Having said that if you have decided that you need a transistor in strong inversion, you have to find out how that transistor affects the overall performance of the amp. For e.g. a gm/ID difference between 10 and 5 MIGHT not affect the matching properties of two transistors that act as current mirrors but it could make a very big difference in the voltage headroom. Therefore, you might have to come to a tradeoff and make the gm/ID = 7 or 8. Same applies to other portions of the circuit.

The other point to keep in mind is that with temp. corners, process variations, you probably dont want the transistor biased in strong inversion going to vel. saturation or moderate inversion. and, you might just decide to make this transistor have a gm/id of 8 or so.

 

[maharshi_qis]

Re: Gm/Id methodology

in gm/id method
1.u ll darw plots id/(w/l)vs Vov
2.gmro vs Vds
3.gm/id vs vov
then for the required vov u can find Id/(w/l)..
As u know the operating curr Id u can calc. W/L value ..
Intially chosse some w/L = 10 for plots..u can use the same for getting various w/L for ur designs..

 

[spbhu]

Re: Gm/Id methodology

There is no great meaning in deep sub micro technology!