At that frequency I'd expect the active device to be
in some other material, an epi layer on top of a GaAs
handle. Mechanical handling issues will limit how thin
the wafer can be during fabrication, any thinner you
would do with a backgrind at end of line. The foundry
would assert a minimum thickness their equipment can
run without undue breakage. Likely set up for standard
available wafer thicknesses I expect. I'm no III-V
guy but I'd expect that high frequency wants all the
semi-insulating thickness you get so as to drive down
packaging related parasitics. I don't know nuthin' from
wavelength effects or whether this is even a concern.