The main intention for checking hold time is to make sure that the previous data is not over written.
So if min path data arrives to fast just after the clock then u will get hold timing violations.
u have to fix these by adding delay buffers, so that ur min path is delayed.
Good question. As said earlier, the main intention for hold violation check is to ensure that the flop always gets the value that was on "D" pin before. If the clock delay between the launch flop and the capture flop is more than that of the data path, then it results in hold violation and for this we need to make sure that only the same clock edge is considered.