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hold time calculation

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ASIC_intl

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How to calculate the hold time of a flip flop and also a latch?
 

The hold time for every cell should be listed in the library. You don't need to do any calculations because it's one of the unit parameters.
 

I want to know the way to find out the hold time of a flop. Similar to the way we can calculate the delay of set up time of a flop.
 

gliss said:
The hold time for every cell should be listed in the library. You don't need to do any calculations because it's one of the unit parameters.

What happen if someone ask you "From which heaven we can pull those datas such like Setup,Hold time down and put them into our libraries?" my friend .. :D ... Ha, i'm just kidding...

In fact you are right, those datas must be listed in our design libraries, but the library designer(not us) must do self calculation to get those datas, it can be done with the help of SPICE, hand,pen and CalC and paper ....
 

I want to know the way you can calculate hold time of a flop by manual calculation (not by SPICE or calculator).

How can it be done?
 

As previous posters have tried to tell you, hold time is never calculated by hand. It is the result of transistor-level circuit simulations of the flip-flop. The calculations involved are much too complex to do by hand. In addition, you need to have foundry parameters for the transistor models and also foundry parameters for the interconnect layers that connect the transistors, not to mention the layout geometries of the cell.

This is not something anybody ever calculates by hand.
 

Hi

Suppose I give you a D-flip flop. And then I ask u to find out the hold time as well as set-up time of the flip flop.
How will u calculate it by hand? In this case suppose the gate delays for nand gates and inverters that make the flip flop are provided so that you need not to go down to transisitor level to know the delays of gates that make the flop.

The question I am asking u is the question that is asked in interviews for selection?
 

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