I don't agree with the answer.
hold time is the minimum time, data requires to stay in its present state after the clock changes, so that the data can be latched to the output "q".
My question was,
How to calculate it?
and what does it signifies?
as said above hold time is entirely technology dependent. it is given by the library vendor along with other details like cell area, power consumption etc.
i dont think there is a tool to obtain tht.
all tools read it from the library files
Perfectly fine!!!
But I am a library vendor, Then as a library vendor how will i calculate delay.? Please don't confuse me.
if you know abt seq cells, There is something called BHT i.e worst setup+ worst clock to q. and there is some thing called hold number.
Hold time of a FF is calculated by spice simulation. YOu assume a initial hold time, and then run the spice sims, so that the data changes exactly after your initial guess say 't ps', your assumption should be large enough so that at first sims, the data is latched perfectly. Then you do repeated sims in a binary search fashion in spice, replacing 't ps' by t/2 ps, and so on, until you get close enough 'actual' hold time. Then depending upon the 'error' margin you would accept, you will get your hold time in 8-16 simulations.
you perform these simulations for various corners, and then do a data sheet of hold time.
Usually lib vendos write their own tool to automatically do that. but I am sure anybody can write a script to do it.
hope it helps,
Kr,
Avi http://www.vlsiip.com
A flop is made of CMOS.So the hold time is the time taken by the CMOS circuitry to get the input value and latch it . The input must be stable until this is done. The hold time corresponds to the switching time of the MOS transistor.The input must be stable until the MOS switches.Obivously the switching time of the MOS is technology dependent.......