I have a question related to Multi cycle paths. I know that by default, the hold is always checked one clock edge prior to setup edge. Also during MCO exceptions, we add hold constraints where we move hold checking to different edges.
Can anyone explain:
1. why hold checks are done 1 clock edge prior to setup edge.?
2. why do we move hold checking to different edge??
1) read any digital asic tutorial or textbook, the difference between hold and setup is very straightforward. just google it.
2) once you understand 1, you will understand 2.
1) read any digital asic tutorial or textbook, the difference between hold and setup is very straightforward. just google it.
2) once you understand 1, you will understand 2.
I really don't think you do. If you did, there wouldn't be such question. From the way you wrote your question, I can assure you, you don't know what you are asking. here is a video that might help you: https://www.youtube.com/watch?v=L7drJ_-M-N8