Higher Power Consumption after Clock Gating

[awais980]

If I compile the design using "ultra" method and select the power gating option in Design Compiler ('compile_ultra -gate_clock' command) then the power consumption is higher than the design without using power gating. The design without clock gating is consuming lets say 100 mW then clock gated design uses 104-105mW.
So, in this scenario, should I try manual clock gating in the design?