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[SOLVED] High-side gate driver for 150kHz switching speed.

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mrinalmani

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My application requires MOSFET switching (Cgs = 2000pF) at approximately 150kHz. The duty cycle may go down to 15% and thus a typical switch ON-OFF interval my reach as low as 1us.
Although motivated from the requirements stated above, I have certain questions that are general for any switching application.

1. OPTOCOUPLERS
Opto-couplers seem to have large switching delays (0.5us to 2us), but I find many posts suggesting their use for high speed application. How can this be explained? Are opto-couplers suitable for speeds as high as 150kHz?

2. PULSE-TRANSFORMERS
I also find posts strongly recommending pulse-transformers for high-speed applications. But the transformer seems to have a leakage inductance figuring around 300nH to 1uH. This should severely limit the rise time of the pulse. How can their use be justified. What are the techniques for improving their response time.

3. DRIVER-IC
Driver ICs seem to have an answer, but they are expensive, and all the more expensive for tight switching delays. So their use is temporarily being suspended and perhaps permanently if another cost-effective solution can be found. (please bear in mind "mass -production", each dollar counts)

4. DISCRETE COMPONENT VERSION OF DRIVER IC
I am strongly looking forward to design a gate driver out of discrete components only. I successfully made one for a 12V HBridge. Now I need to make one for 600V. This voltage requirement creates an immediate difficulty. Consider the attachment below.... (simplified circuit)

(a) First things first, I intend Q10 to act as a level shifter. It is transforming a 3.3V input to 12V. Please note that this 12V is with respect to the floating ground and 3.3V is wrt. the actual ground. Is this what level shifters are required to do? Or do they level-shift voltages wrt to the same original ground?

(b) If instead of 12V we had 600V, then firstly, Q10 would have to be of 600V and not merely 20-30V. Secondly, even small amount of current through Q10 would cause large power losses. Now, what makes the driver IC's level shifting so efficient even at high voltages. How do they implement it?

(c) Consider when Q10 is ON. It will pull down the totem-pole input voltage to zero. But we do not want it to go to 0. We simply want it to be pulled down to the level of the floating ground. If it is pulled to zero then we would have a -600V across the totem input! How to go about this problem? (Please note that in a H-Bridge this situation does not occur because as soon as the high-side MOSFET is turned off, the low-side MOSFET if turned on, and thus the floating ground is pulled down to zero and does not remain at 600V)

All suggestions would be deeply appreciated...
 

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Thanks, I found the list... but they are pretty expensive, infact as expensive as a high-side gate driver IC with similar delay!
 

To get something running in the first place you can use a 600V hi/lo side driver IC such as the FAN7382 (14 pin) and buffer the o/p's with a good BJT emitter follower (2A 200MHz devices) - this gives great results.

We have product in the field that runs this way at 125kHz continuous, 400V offset.

Regards, Orson
 
Toidentify useable gate drivers, you'll look for delay skew and minimum pulse width rather than absolute delay.

A number of good opto-isolated gate drivers is available, as already mentioned.

Pulse transformers will usually require active pulse forming circuits on the secondary side to work for larger gate cpacitance respectively high speed.

Referring to your discrete level shifting driver, it has at least two serios problems:
- the large pull-up resistor current loads the bootstrap capacitor extensively
- Q10 will be probably damaged without a current limiting means
 

1. Please explain the difference between delay-skew and absolute delay. Even if the absolute delay does not result in increased switching losses, will it not slow down the response of the control-system?

2. Although I have not heard of active pulse build-up, but as the name suggests, I think it should be something related to generating another pulse by the use of active components, upon detecting a partially complete pulse at the secondary of the transformer. I'll search for related papers... correct me if I am wrong.

3. The 510 ohm resistor limits the base current of the totem to 25mA. This is essential if peak output of approx 1.5A is desired. Since this current lasts only for a few micro-seconds, the bootstrap capacitor stays alive. (verified by calculations and simulation). The 15 ohm gate resistor is used as a current limiter. (Totem is capable of 2A peak)
 

1. Yes. But I presume that 0.5 or even 1 µs additional delay won't be a problem for the control loop. You can also get optoisolated gate drivers with 200 ns maximum propagation delay. An isolated or bootstrap supply is needed in any case.

2. The problem with unmodified pulse transformer gate control is slow rise time according to leakage inductance and gate capacitance, also duty cycle dependend level. Active pulse forming involves at least level clamping, better a circuit that regenerates gate pulses with fast risetime.

3. The voltage across the 510 ohm resistor is bus + bootstrap voltage, rather 50 mA current in your circuit. That's probably much more than the dynamic gate power demand. The high current will at least limit the achievable high duty cycle. And more problematical, the current through Q9 CB diode and Q10 is only limited by Q10 base current.
 

The world leaders in enhanced gate IGBT's with switches over 1GW capability are Mitsubishi Electric.

See the opto-isolated drivers here. I dont know the price, but these I would suspect are the best technology available.

https://www.pwrx.com/summary/gate-drive-circuits.aspx

research material
http://www.pwrx.com/LibrarySearch.aspx?s=1^0|2^78|3^0|
 
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Thanks a lot for the suggestions. I'll get back to the thread after a bit of more work-out.
 

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