high precision, low offset cmos comparator

Status
Not open for further replies.
W

wonbef

Full Member level 3
Joined
Oct 13, 2004
Messages
188
Helped
8
Reputation
16
Reaction score
6
Trophy points
1,298
Location
Nanshan, Shenzhen
Activity points
1,083
hi, all,
now i am designing a high precision, low offset cmos comparator in continuous-time applications. the comportant requirement of this comparator is very low offse, and Vos < 2mV must be met in my application, and the other features is loose.

pls recomment me some resources or comparator structures. thank you very much!!!
 

for continuous-time, I saw some products from TI with 0.5mV offset but the maximum value is 15mV. really hard, be sure to check the Monte-carlo simulation results
 

from circuit structure, devices size, and ..., can i reduce the input offset to 2mV?
 

Using Bipolar devices, it is much easier. For CMOS, I 'm not sure. It will shown it has a big change range when you are doing Corner and Monte-Carlo Simulation for CMOS Comparator.
 

Generally, Vos contains system offset and mis-match. The former dependents on gain, the latter on transistor size. I think 2mV is possible if speed is not concerned.
 

pls upload the following papers if have! many thanks.

A 1 mV MOS comparator
Yee, Y.S.; Terman, L.M.; Heller, L.G.
Solid-State Circuits, IEEE Journal of
Volume 13, Issue 3, Jun 1978 Page(s): 294 - 297
Digital Object Identifier

A precision variable-supply CMOS comparator Allstot, D.J.. This paper appears in: Solid-State Circuits, IEEE Journal of Publication Date: Dec 1982 ...
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…