Hi
The oxide layer has been made of Hafnium Dioxide (HfO2) and has been grown using dry etching, in which during etching a thin layer of SiO2 will be formed as an intermediate layer between body and oxide. The thickness of SiO2 is 1 nm whereas the oxide thickness, in which is varied between 2 to 5 nm, has to be investigated using SILVACO.
The device is part of DRAM cells and has to work at voltages up to 3.3 V and has to be fabricated based-on 22 nm technology.
The aspect ratio (W/L) of the device is varied between 1.5 to 3.0 due to minimization of the overall design.
The thicknesses of “S” and “D” region as well as Silicide/Hafnide metals are arbitrary (not more than 100 nm) and whole device has to be fabricated on a single 450nm Si wafer. Remember: Gate metal, Hf+Al, differs with “S”, “D”, and “B” that are Si+Al.
The doping concentrations of “S” and “D” region are either n+ or p+, depends on the bulk, must be done using Boron or Phosphor Ion-Implantation
1: C-V Analysis of Structure. Bulk: n-Si (1.5x1017 #/cm-3)
2: C-V Analysis of Structure. Bulk: p-Si (15x1017 #/cm-3)
3: ID-VG (fixed voltage of VD=3.3V) Analysis of Structure. Bulk: n- (1.5x1017 #/cm-3)
4: ID-VG (fixed voltage of VD=3.3V) Analysis of Structure. Bulk: p-Si (15x1017 #/cm-3)
Conclusion should address which feature (W/L) gives the best performance of the device in term of quantized electron density and either C-V or I-V characterization of the device
can someone help me for silvaco code