Help with Altera Signal Tap II

[Sink0]

Hi, i am running some tests with a designe, but as it is a prototype there are a few jump wires between two boards. I am trying to take a look at a signal with logic tap II and USB Blaster on a Cyclone II. I am looking at 2 input pins with no pull-up or pull-down. I have a small problem, the trigger seems to be too sensitive.. and if i leave it open or power-up the other board, it trigger randomly. I am looking at the signal right near the FPGA with a 100Mhz Scope.. but the scope does no trigger.... Any idea why the signal tap is so sensible? What i am looking is just some random signal, or is the real signal that is driving the FPGA logic?

Thank you!

 

[yadog]

no matter Sig TAP nor scope , you need design your trigger condition carfully.

If the trigger signal was OK,you can catch what you want to watch!