sebastian.barbosa
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Hello, im new to verilog and i need your help.
I have to create a verilog code capable of "add or substract" frequencies (+-1 Hz).
What i mean is this:
I need a code with (for example) input A, and input B
If I have a 1K [Hz] clock input , I can divide its frequency to (for example) 500 hz . Then the my code has to do this:
If A then add 1 hz to 500hz (now the frequency is 501 hz) , If B then substract 1 hz from my current frequency.
I cant think how to make this code. I know i can divide frequency with counters but add or substract 1 hz is out of my knowledge. Thank you
I have to create a verilog code capable of "add or substract" frequencies (+-1 Hz).
What i mean is this:
I need a code with (for example) input A, and input B
If I have a 1K [Hz] clock input , I can divide its frequency to (for example) 500 hz . Then the my code has to do this:
If A then add 1 hz to 500hz (now the frequency is 501 hz) , If B then substract 1 hz from my current frequency.
I cant think how to make this code. I know i can divide frequency with counters but add or substract 1 hz is out of my knowledge. Thank you