Help reg file download to FPGA

Status
Not open for further replies.

Dhans

Junior Member level 3
Joined
Sep 14, 2005
Messages
30
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,473
bitstream:98 - there are

hi

i am using VirtexII FPGA device.
I was downloaded my bit file using Boundary scan(thrugh MULTILINX cable-JTAG)
Always i am getting error like

Bitstream 98 : There are ## differences.
Impact 39# :There are ## difference.

I dont know how to rectify it.
What are the files to be downloaded?
what is neccesity of .mcs file.

Help me.
 

bitstream:98 - there are

Hello,

The bitstream file is the .bit
If you download the bitstream with Jtag cable you must set JTAG Clock in the startup option in the Process Properties menu (Process -> Properties -> Startup Options); the default settings is CCLK.
The file .mcs is the bitstream to be loaded into an external flash configuration memory.
I hope that will help you.
Regards
 

bitstream:98 - there are differences.

hi

i have created the .bit file.actually i dont want to download the file to flash memory.
but i am getting error like

Bitstream 98:There are ## difference
impact 395 :there are ## difference.

The program is not succeeded. i searched lot of sources in the net.But i culn't find anything.
It would be greatful, if u help me.

Regards,
Dhans
 

bit file impact

I think that the problem arise because of the CRC error. Please use cable_iv download cable from Xilinx.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…