Good day guys..
Please help me with these..
I'm doing a common gate with an active load. During transient analysis, the output wave with respect to time looks fine. But in the FFT analysis, the output wave generates many harmonics.
My concerns are:
1. I'm curious on what happens in the inside of the common gate (in this case) that causes these harmonics to pop out. What's the circuit that causes them?
2. Why is the level of output compared with the input in the FFT graph is higher? What causes this difference in level?
Attached are the following:
My .SP code
Transient Results
FFT Analysis Results
Thank you very much for any help.
Added after 3 minutes:
sorry, concern number 1 should be like this:
1. What's in the circuit that causes harmonics to be generated.
If you look at the output sinewave, you will notice that is fatter at the top (not a good sinevave!): the common-gate transistor is going out of saturation. Try to either increase vbias, lower the DC voltage of your input, or increase W/L of your common-gate transistor.
thank you for the reply...
because from my dc analysis, it shows that the output can swing properly from 0.4 to 1.7 range..then from the ac analysis..the gain reached to 45dB..with that, i compute that the Vin max should be around 3.5mV Vpeak..to my amazement...even at around 3mV, the output is already distorted..i don't understand it...another thing is, why is it that my output don't even reached the 1.7 level...
This result means small signal gain, your application is large signal, however. As JoannesPaulus stated above, during the top part of the positive half wave the transistor leaves the saturation region and arrives at moderate inversion, by this decreasing its gain. Possibly a slew rate limitation contributes to the broadening of the upper half wave. You could find out by using a lower frequency.
thanks for the reply erikl:
another thing, in the FFT result, i noticed that the output signal spectra of the output is higher (-118dB) than the input (-190)? why is it so?