help on place and route in ISE7.1i

[s3034585]

Hi Guys
I am using ISE7.1i for my design. While doing place and route i get a particular warning which i am not able to understand. Can anyone please explain wht it means and why it is comming.

WARNINGar:276 - The signal MB(197)_IBUF has no load

I get this warning for all the io pins what i have for my fpga.

Thanks in advance
tama

 

[vs21]

Hi,

That means, whole of your logic is optimized, check, whether your clock is properly synthesized.

Regards
Viks

 

[bansalr]

It means that this particular input is not used in the design. i.e no load to the input.

 

[s3034585]

Hi vs21
Thanks for your reply. I could not understand checking the clock is synthesised or not... I mean how do i verify this. Can you please explain.

Thanks once again..
tama

 

[bansalr]

just check in the PAR reports no of clocks. otherwise u can open the design into fpga editor and view the clock net.