I don't think the output stage is right, it needs to be a replica
of one or the other reference stacks (pick the left hand one,
bjt1 + its resistor). I would expect only about 0.5V output
as-drawn.
If you suspect op amp connection, try swapping the inputs.
Try breaking the loop at the op amp output, run the current
mirror rack with a voltage source, sweep it and watch
the op amp output. If it doesn't look like a great comparator
and you don't see roughly 1/2V at qp5.D and qp5.D at the point
where the output switches, you can look elsewhere for the
topology fault. If it switches the wrong way (in phase
with source voltage) then you only have a polarity problem.
I would go a lot bigger on the FET sizing so as to work
better at low headroom. And I see no explicit startup
circuit, so you might need to run a transient analysis instead
of DC so you can apply some "kick start". or add a DC-functional
startup.