A help is required in the Xilinx ISE 4.2 Software.
I know that xilinx automatically allocates pins for the device architecture.
But we want to allocate pins manually..
there are 2 possibilities:
1. assigning the pins in the constraints editor (not always working)
2. manually editing the constraints file (*.ucf). It can look like that:
NET digit_select<0> LOC=P3;
NET digit_select<1> LOC=P5;
NET digit<1> LOC=P20;
NET digit<0> LOC=P21;
I'd suggest the last method cause there seem to be some bugs in the constraints editor of ISE 4 ....
Note: in the post bartart referred to the syntax is for ISE5.x (containing quotation marks)
Thank you guys for the reply to my much needed help.
The idea of editing the User Constraint file was really a start.
Well we found out that Xilinx itself has its own software driven GUI which allows you to specify both pin and timing contstaints and this program is known as Xilinx Constraint Editor.
Only found it out today.
But thnks for the hints and the help.