[SOLVED] help need i'm getting unexpected token error

[phobos1]

module spimas (sck,mosi,miso,ssel,rst,clk,datain,dataout);
input miso,clk,rst;
input [7:0]datain;
output [7:0]dataout;
output sck,mosi,ssel;
reg sck,mosi,ssel;
reg [7:0]dataout;
reg [10:0]state;
reg [10:0]next_state;
reg [7:0] buffer;
parameter idle=11'b00000000001,load=11'b00000000010,shift0=11'b00000000100,shift1=11'b00000001000,shift2=11'b00000010000,shift3=11'b00000100000,shift4=11'b00001000000,shift5=11'b00010000000,shift6=11'b00100000000,shift7=11'b01000000000,store=11'b10000000000;
always@(posedge clk)
begin
if (rst==1'b1)
state<=idle;
else
state<=next_state;
end
always@(state,ssel)
begin
//next_state=11'b00000000000;
case (state)

idle:
begin

if (ssel==1'b0)
next_state=load;
load:
begin
if (buffer==8'h00)
next_state=shift0;
end
shift0:
begin
next_state=shift1;
end
shift1:
begin
next_state=shift2;
end
shift2:
begin
next_state=shift3;
end
shift3:
begin
next_state=shift4;
end
shift4:
begin
next_state=shift5;
end
shift5:
begin
next_state=shift6;
end
shift6:
begin
next_state=shift7;
end
shift7:
begin
next_state=store;
end
store:
begin
next_state=idle;
end
default: next_state=idle;
endcase
end

always@(posedge clk)
begin
if (rst==1'b1)
buffer<=8'b00000000;
case(state)
idle:
begin
ssel<=1'b0;
buffer=8'h00;
end
load:
begin

buffer<=datain;
end
shift0:
begin
mosi<=buffer[7];
buffer<={buffer[6:1],miso};
end
shift1:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
end
shift2:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
end
shift3:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
end
shift4:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
end
shift5:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
end
shift6:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
end
shift7:
begin
mosi<=buffer[7]
buffer<={buffer[6:1],miso};
ssel<=1'b1;
end
store:
begin
dataout<=buffer;

end
default:
//begin
mosi<=1'bx;
end
endcase
end
endmodule



someone correct me in this