narayani
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I have taken example of MW_Ckts > LNA_1GHz_wrk.7zap from the Agilent Advanced Design System 2011.10.
This is example for the layout design of 1 GHz Low Noise Amplifier ( LNA ). This 1GHz LNA, which contains both active( transistors), passive elements(R,L,C), and MLINS. From this schematic, we can generate the Layout of LNA.
My question is, how to get the EM - Co Simulation for this 1GHz LNA schematic circuit. Can you anybody help me to get the EM -Co Simulation for this circuit.
Can you give guidelines, how to get the EM- Co-Simulation, when circuit is built for generating layout, which contains both passive and active elements.
This is example for the layout design of 1 GHz Low Noise Amplifier ( LNA ). This 1GHz LNA, which contains both active( transistors), passive elements(R,L,C), and MLINS. From this schematic, we can generate the Layout of LNA.
My question is, how to get the EM - Co Simulation for this 1GHz LNA schematic circuit. Can you anybody help me to get the EM -Co Simulation for this circuit.
Can you give guidelines, how to get the EM- Co-Simulation, when circuit is built for generating layout, which contains both passive and active elements.