Re: Simple SPI Interface
You said master, so that means you provide the clock doesn't it?
But if you only have a 20MHz master clock, and you want to provide a 20MHz SPI clock I think that's pretty hard to do well. You should have a 40MHz master clock input to the CPLD and generate the 20MHz SPI clock from that.
Then, generate your SPI clock, data and chip-selects using a small state machine.
Output new data and lower clock on one cycle, raise clock on the next, repeat.