Help me with CRC calculation problem

[klop]

CRC calculation problem

My task is to design CRC calculation hardware according to the given software.
The previous version of software contain the following table for CRC calculation:

unsigned int crc_tabccitt[256]= { 0x0000, 0x1021, 0x2042, 0x3063, ...

I found that such a table corresponds to the polynomial: x^16+x^12+x^5+1

I generated CRC calculation H/W at h**p://w*w.easics.com/webtools/crctool and it worked perfect.

Now the table is
static int fcstab[256*] = { 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, ...

I found that such a table corresponds to the polynomial: x^16+x^11+x^4+1
(So called reversed CCITT)

I generated CRC calculation H/W at https://www.easics.com/webtools/crctool and
it doesn't work properly (H/W and S/W dive the different results). I tried to complement and swap bytes but such an operations don't not help.

Could somebody please help me?

klop.

 

[rebel]

Re: CRC calculation problem

will this help ----> https://www.easics.be/webtools/crctool ..dont know ..

 

[benzwishc]

Re: CRC calculation problem

you can refer to the papar named "Parallel CRC Realization"

Added after 40 seconds:

you can refer the papar named "Parallel CRC Realization"

 

[sree205]

CRC calculation problem

Hi,
simple serial implementation of CRC in hardware will be nothing but linear feedback shift register. but, it ll take the same no. of clock cycles as your data width and the shift register width will be degree of the irreducible polynomial which is used.

 

[acdoering]

Re: CRC calculation problem

I have worked on CRC methods recently.
I would recommend you the following:

start with data, which contains just a single '1', all other 0.
This should give you a hint of what goes wrong.
You should consider, that both methods you described, SW and HW work
with the same principle (Horner's scheme).

If you use an HW implementation of 32-bits wide, you have to run the SW-version
four steps, because it handles only 8 bits at a time.
With the single '1' method you should easily see what goes wrong.
If you can, print out every intermediate byte in both versions.
A typical problem is a "shift" by one step.

Andreas

 

[m.abdulmoniem]

Re: CRC calculation problem

Hi everybody
I'm searching for a dependable Crc32 calculator to verify my work

Could anybody help me?

Thanks
Mohammad

 

[vamsi_addagada]

CRC calculation problem

hi mohammad
u r calculation CRC32 it is the serial bit is single bit
that u usng the LFSR

Added after 28 seconds:

vamsi

 

[m.abdulmoniem]

Re: CRC calculation problem

Hi
My code implements the parallel crc32 where the data width is a nibble (4 bits) which is applied for ethernet

Now, I made a testbench that examines the value of the generated CRC and counts the number of clocks required to get it

It examines the value of the CRC by comparing it with a value I obtained by the calculator from http://www.zorc.breitbandkatze.de/crc.html

for example:
using this calculator for a Data message=U (which is 8'h55) we will get CRC=C9034AF6

to check my work I made this testbench
// eb1 1
always @(posedge Clk)
begin
Data = 4'b0101;
if (Crc[31:0] == 32'hc9034af6) begin
$display("the CRC is given after", Clk_Counter," clocks");
#5 $finish;
end
end

when running the simulator and make a break point at the $display line I found it doesn't stop and continue running forever

Do you think there is a mistake with my work?
Do you think the result of this calculator is not right?

I appreciate ur help

Thanks

 

[m.abdulmoniem]

Re: CRC calculation problem

Also, I want to add something
The tested core compares the Crc value with the magic number of 32'hc704dd7b by this line
assign CrcError = Crc[31:0] != 32'hc704dd7b;

and when I tried to simulate it I found the CrcError signal is always high

I don't know where is the mistake?

could you help please?