Help me with a program for 2-bit comparator in VHDL

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fm_com_28

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2bit comaraor

Dear,

I want to design a 2-bit comparator using VHDL that takes two unsigned std_logic_vectrors A and B and produces bits L,G,E, where

L=1 , if A<B
G=1, if A>B
E=1, if A=B

so if one can help me in finding a program for this design,
regards
 

Re: 2bit comaraor

Its very simple!
For more general reusable design see data sheet for CD4585.

Code: 
library ieee;
use ieee.std_logic_1164.all;

entity comparator is
  
  port (
    A : in  std_logic_vector(1 downto 0);
    B : in  std_logic_vector(1 downto 0);
    L : out std_logic;
    G : out  std_logic;
    E : out  std_logic);

end comparator;

architecture behav of comparator is

begin  -- behav

  process (A, B)
    variable G_tmp : std_logic;
    variable L_tmp : std_logic;
    variable E_tmp : std_logic;
  begin  -- process
    G_tmp := '0';
    E_tmp := '0';
    L_tmp := '0';  
    if A > B then
      G_tmp := '1';  
    elsif A = B then
      E_tmp := '1';
    else
      L_tmp := '1';
    end if;
    G <= G_tmp;
    E <= E_tmp;
    L <= L_tmp;  
  end process;

end behav;
 

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    fm_com_28

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