vco design & genesys
IICCEE said:
When I used genesys to design a VCO and select the AT320,for a 900MHz VCO.
I get the ircorrect result,why?
Some one check the genesys VCO design?
Genesys 2003.03 has 2 tools for oscillators design:
1. Oscillators Synthesys, based on Open loop Gain criteria and
2. Closed loop nonlinear oscillator analysis, new mode of Harbec - HB-analysis program, integrated in GENESYS.
1st tool is based on linear active divice model - s2p-parameters file.
The synthesys tool did not takes into account, that the DC-regime of the real nonlinear device will be changed, when it will be shunted by low-ohmic port imedance. When you changed the device model to nonlinear, don't forget install the blocking capacitor in serial with load (input/output port), else it not will work.
2nd tool is working with closed-loop, i.e. real oscillator's circuit.
It includes:
1) small-signal analysis of oscillations conditions (checking a node's impedance, where you set the "OSC_PORT"):
Re(Zosc_port)<0 and Im(Zosc_port)=0.
Of course the port may be choosen as load port, but not always - sometimes after closing feedback the circuit don't shows the oscillations criteria satisafaction at a frequency, while if connect the testing OSC_PORT to an internal circuit's node (may be where the circuit has the maximal ac-voltage, when it's oscillating);
As result after pushig button "Find Initial Oscillator Frequency" of the Harbec Options/Oscillator tab, the small signal frequency of oscillations (FoscSS) will be found, if it exists. If you set checkbox "Display Spectrum and waveform graphs", than after 1-st running of the HB-analysis the oscillator analysis output graphs and tables will be created automatically:
- spectrum, waveforms and table, which shows actual value of the oscillations frequency in nonlinear regime - result of HB-oscillator analysis.
2) Nonlinear oscillator analysis.
The circuit is analized as circuit with external exitation with unknown frequency (Fosc) and amplitude (Vosc).
The oscillator port is modeling by the sin-voltage source with amplitude Vosc_port and frequency Fosc, connected to the OSC_PORT-node of the circuit through frequency-dependent switch, which is ON the only at 1st harmonic of Fosc and OFF for DC and all other frequencies.
The HB-oscillator analysis solves the nonlinear task:
|Iosc(Fosc, Vosc)|/Vosc = 0 (1),
using as initial guess Fosc=FoscSS and Vosc_port set by you (otherwise it will be set as default value) before running the nonlinear oscillator analysis. The equation (1) means, that the in Steady-State regime the amplitude of 1st harmonic of voltage at OSC_PORT-node will be exactly equal to the amplitude of the external voltage source Vosc_port, current of the external source is zero and the source not affects to the circuit regime. If the HB-oscillator analysis has been converged successfully, the table of the HB-oscillator analysis parameters will shows enough small values of the |Iosc| and "oscillator admittance" Gosc=|Iosc/Vosc| (typically |Iosc|<1uA, much smaller, than the oscillators nodal currents), otherwise you set wrong initial guess for Vosc and HB-analysis will show the convergence issue.
I've attached here a simple example of the AT32011-LC oscillator.