hi all,
I want to do some fractional arithmetic using VHDL,
I would thankful to you if any one could help me for the same.
simply i want to make some MAC (multiply accumulate unit ), now because integers due to overflow cann't support this arithmetic so i want to do fractional arithmetic.
To implement fractional arithmetic, the numbers will be represented in 2's complement. That means that they will be sign-extended.
The most significant bit of a two's complement number represents its sign, and the remaining bits represent its magnitude.
If the sign is 0 then the number is positive and when 1 then the number is negative.
So a positive number written in 2's-complement is the same as the
number written in unsigned notation with the most significant bit to be zero.
A negative number is written in 2's complement notation by inverting all of the bits of its absolute value, then adding one to the result.(The sign bit will remain 1)
hi,
I agree with what you have written , but ceratinly i need more to implement FRACTIONAL ARITHMETIC, the details of which you have not put here. By fractional arithmetic i mean to deal with nos which will need to be computed in real data types.
thanks for your reply
I think you mean fixed point arithmetic? There are lots of references on google. There are no real or fractional data types in hardware. We simply represent it as an integer and declare the position the decimal point lies.
hi Chekmate,
I think you have got the point, I exactly want to deal with fixed point arithmetic, but i am unable to locate material through www.google.com. can you suggest me some direct links for that
thanks and regards
This is a good explaination about Fixed point representation. I already use and work with them for along time but I used fixed point DSP of TI (F2812).
However, this time I have to use FPGA, so please tell me the information about VHDL library. :|