vaf20
Full Member level 3
hi again
i want to map a design in a CPLD and then check it's functionality.this CPLD mounted on a board and is a part of close loop with other.it seems functionality will be checked with ChipScope during circuit's normal operation.
could anyone tell me how it would be?
tnx
i want to map a design in a CPLD and then check it's functionality.this CPLD mounted on a board and is a part of close loop with other.it seems functionality will be checked with ChipScope during circuit's normal operation.
could anyone tell me how it would be?
tnx