xanhphysics
Junior Member level 1
I 'm a final year student . I hope all of you can help me my problem when i simulate continuous delta sigma modulator.
question 1 : How i can model half delay block by Simulink ?
I try to model block ( z^-1/2) ( see figure attached ) but in Simulink library don't have block (z^-1/2) .
Do you know how to model or any other block can do ?
Question 2:
when i got new loop fileter transfer funtion (To make up a half clock cycle delay, the equivalent transfer function with halved sampling time is derived as
L1(z^1/2)=( -0.7567 z+0.456z^1/2+0.545)/(z^3/2+0.5678*z+0.345*z^1/2+1)
the CT loop filter transfer function L1(s) for NRZ type DAC can be calculated using Matlab as:
Actually i know how to convert L(z) into L(s) for NZR type ADC but dont know how to convert L(z^1/2) to L(s) for NZR type ADC by Matlab. Can anyone guide me?
I look forward to hearing anyone can help me . I very nervous coz my project prepare for deadline.
Thanks all