elddie
Newbie level 6
hello,
many EDA tools support low power design
anyone can tell me what kind of low power techniques supportted by the EDA vendor (cadence, synopsys, MAGMA...)?
i know the synthesis tools have switch active reduction, clock gating, operand isolation & multi-Vth optimization, and any else?
the APR tools can handle voltage island (level shift), and any else?
thanks
best regards
many EDA tools support low power design
anyone can tell me what kind of low power techniques supportted by the EDA vendor (cadence, synopsys, MAGMA...)?
i know the synthesis tools have switch active reduction, clock gating, operand isolation & multi-Vth optimization, and any else?
the APR tools can handle voltage island (level shift), and any else?
thanks
best regards