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HEF4007 gain calculation problem

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kiransbaddi

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Hi, I m using paired mosfet IC HEF4007UBP for designing common source amplifier. Here are its parameters
KP=1m
VT0=1.54
with this above values i have calculated ID for the VGS =2.5V. i got accurate results.
real problem came when i calculated gain. I expected gain aprox. 4.5 but results showing 6.65.

I m working both in hardware and software. i m getting problem in hardware.

Is their any additional parameter we need to consider for calculation in hardware ? i don't have accurate Spice model.
 

The gain is a range of numbers. Some ICs will have a higher gain than other ICs. A Spice model uses only a "typical" gain number. The gain is affected a lot by the supply voltage as shown on this very old graph that shows the "typical" gain:
 

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Single stage inverters depend on the Vds which usually splits Vgs /2 at room temp and thus gain and gm are both supply sensitive and most sensitive at Vdd=5V so mfg tolerances are greater.

Old CD4xxx gates were typical gain of x10 at 12V for UB chips and 1000 for B types. with a wide margin.

This obsolete chip has the following typical values.

hef4007.jpg Keep in mind the RdsOn rises to 1K + at low Vdd so the Rf value must be high

Although negative feedback reduces the Zout by the feedback gain..
 
HEF4007 gds and other parameters

Hi can anybody help me to calculate gds of paired mosfet i.e HEF4007. i dont have proper datsheet and spice model
After long struggle i gave found out the threshold voltage of paired MOSFET(they are not same)
 

A HEF4007 is made by Philips (called Nexperia today) and is a CD4007 made by everybody else. Nexperia and Texas Instruments have detailed datasheets on their websites. The datasheets talk about them as logic inverters, not as linear amplifiers.
Your calculation for gds will have minimum, typical and maximum numbers since each IC is different.
 
. thanks audioguru. can you help me to get the spice model for HEF4007. i m anable to find it anywhere
 

I do not know why you want to simulate an old HEF4007, for school work? Simply buy one (or a few hundred of them) and test them.
If your hardware uses a solderless breadboard at fairly high frequencies then all the stray capacitance between the many rows of contacts and wires will cause the gain to be much lower than if a compact pcb layout is used.
 

Yes it is school project. i m designing multistage opamp. To get the accurate results such as gain and bandwidth i need spice model
 

A number of 4000 SPICE models can be found in the Ltspice Yahoo group. Need to sign in to access it.
https://groups.yahoo.com/neo/groups/LTspice/files/ Lib/Digital CD4000/
https://groups.yahoo.com/neo/groups/LTspice/files/ Lib/Digital HEF4000/

Here's are HEF4007 transistor models

Code:
.subckt hef4007n d g s p
M d g s p hef4007_n w=50u l=6u ad=450p as=500p
.ends 
.subckt hef4007p d g s p
M d g s p hef4007_p w=110u l=6u ad=1.2n as=1.5n

.ends 


.model hef4007_n NMOS
+LEVEL = 3
+KP    = 42u
+VTO   = 1.5
+TOX   = 55n
+NSUB  = 3.3E16
+GAMMA = 2
+PHI   = 0.65
+VMAX  = 150E3
+RS    = 40
+RD    = 40
+XJ    = 1.5u
+LD    = 1.2u
+Theta=0.1
+ETA   = 4

.model hef4007_p PMOS
+LEVEL = 3
+KP    = 25u
+VTO   = -1.6
+TOX   = 55n
+NSUB  = 2.8E15
+GAMMA = 1.
+PHI   = 0.65
+VMAX  = 970E3
+RS    = 80
+RD    = 80
+XJ    = 1.25u
+LD    = 1u
+Theta=0.15
+ETA   =7
 
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