Hi,
In asic design how are high fanout nets handled?What i mean is do we need to work on it separately for signals like reset etc as we do for building clock tree.Any idea how magma handles high fanout nets?Also any special care to be taken while doing synthesis with regard
to these high fanout nets.
Regards
Vicky
Hi,
Any idea if magma tool has any equivalent command to synopsys set_dont_touch property on a net.I guess for high fanout nets we can set this property during synthesis and later build a separate tree fo it as we do for Clock tree.
Regards
Vicky