You're right - level49 is too complex to find KP etc. in it. Don't forget that Level1 models which you use for hand calculations were derived for long channel transistors (1u,2u..) where you don't have the short channel effects that you see in 0.18u and that level49 tries to model.
What I usually do, I make a simulation for the Id=f(Vgs) for some constant Vds and W/L and plot it. Then on the same plot I plot a function that describes the formula for hand calculating Id i.e.
(KP/2)(W/L)(Vgs-Vt)^2. Playing with KP (given Ialready know Vt) I can usually get a good fit of the two curves at least for Vgs up to about 1.2-1.5 volts. For higher Vgs the two curves diverge too much. This Kp is usually good for hand calculations in analog design. You have to repeat this for different W/L and different temperatures. From the collected data you can derive some average values. This is by no means accurate, the hand calculations give just a general ball-park figure. You will have to trim the circuit by simulations, but at least you start from a point that is closer to the truth. Usually the results are acceptable for saturation operation of transistors, but not good for triod operation.
As for LAMBDA - well, you have to find the Earli voltage. The problem is that if you extrapolate the Id-Vds curves untill they cross the abscisa, they don't meet at one point, which would be the Earli voltage. So, again you can get an impression about Lambda, but not very accurate one.
Another approach would be to ask your fab to give you these values, but usually they don't provide them if it is a digital CMOS process, because they don't care about them.
Hope it helps.