Floor plan
1 - Create a list of the blocks and bond pads to be used and estimate the area of them.
2 - (In mixed signal) identify the "noisy" blocks.
3 - estimate the total die area and draw a limit die size then insert the blocks estimated in #1 but take care of placing the "noisy" blocks as far a possible from sensitive analog blocks... The bondpads must be placed also right now, verifying they are in a correct place to be bonded out...
4 - Within the digital (or noisy) blocks place them in such a way that clock lines get the shortest path as possible at toplevel routing.
5 - Draw some lines for TOPLEVEL PWR and GND so you can define where future PWR and GDN buses will be (where all the blocks will be getting their supply).
6 - Save area for toplevel routing buses (areas where you'll be able to route lines for toplevel interconnect)
Etc, etc.
As you can see, most of the things are obvious and logical things... As posted before it has to do A LOT with experience and practice but following the above mentioned list you can make sure you'll be more than ok.