Hi..
In layer stack up the power and signal layer as well as ground and signal layers are spaced closly about 5 mils or 8 mils.But the PWR and Ground planes in stack up are spaced around 30mils or 40 mils.what is the reason for having this kind of stackup?
If you are placed both the planes very clos is also not useful because the planes in high speed PCB it is acting like a return path for the signals.so if you reduce the spacing between the signal to plane it will reduce the loop of the current and EMI and EMC problems we can reduce it.
The closer the power and ground planes are coupled the better for high speed designs as you are adding planar capacitance. The reason for the stack up on the board you describe is that a foil construction was probably used and no specification of stack up provided to the PCB fabricator. They will have used a
inner core of about 1.0mm with some pre-pregs (approx .3) and foil for the outer two layers. The breakdown voltage of FR4 is listed in the following document: https://www.plasticsintl.com/datasheets/Phenolic_G10_FR4.pdf
As can be seen you would have to have some pretty high voltages to cause breakdown of the isulation. **broken link removed** https://pcbtalk.com/data/upload/Designing_Balanced_PCBs.pdf